FPGA Module for the Khepera robot

Diploma Student: Stéphane Hofmann
Supervisors: Daniel Roggen and Yann Thoma

FPGA Module for the Khepera robot.

A compact FPGA module has been developed, based on the APEX20K200E FPGA (200'000 gates) from Altera. Although it can be used standalone, its most interesting characteristic is that it is fully mechanically and electrically compatible with the Khepera miniature robot. This FPGA module provides a powerful reconfigurable hardware platform for evolvable hardware or evolutionary robotics experiments.

Description and Architecture

The FPGA module contains the FPGA together with SRAM and Flash memory and several connectors to interface with a PC and user extensions (see table below for a feature list). When used on the Khepera robot, the FPGA module extends considerably the capabilities of the robot. However, the module can also be used standalone or on another robot. In the latter case, the I/O pins previously used to communicate with the Khepera become user I/O.

The FPGA module mounted on top of the Khepera robot. The module is composed of two PCBs, one for the FPGA and another for the power supply. The module can also be used standalone or on other robots.

APEX20K200E-2X FPGA with 200'000 gates, 106'496 RAM bits (8320 logic elements)

1 MByte Flash memory (512Kx16)

256 KBytes SRAM (two 64Kx16 chips)

2 user and 2 system push-buttons, 3 user LEDs, configuration switches

26 3.3V user I/O, 2 5V-compatible user I/O (e.g. TTL serial line)

26 5V-compatible I/O for the Khepera bus or user I/O

Stackable modules (multi-FPGA system sharing a single clock)

RS232 connector with transceiver

JTAG connector for Altera ByteBlasterMV and MasterBlasters programmers

Compatible with Excalibur board software development Kit

Supply voltage: 4.5V to 25V

Power board generates 1.8V and 3.3V (1.4A each voltage)

On-board logic for configuring the FPGA from Flash

Self-reconfiguration may be triggered by the FPGA

Oscillator (33MHz) and zero skew clock distribution

Power-on reset circuitry

Clock and power pins available for user modules

Features of the FPGA module

Some tough problems of space optimization had to be solved to fit the system on a PCB of 58mm of diameter (size of the Khepera robot). The result is a module composed of two stacked PCBs:

The FPGA board turret (digital part) includes the major components such as the FPGA, the configuration controller (EPM7064), the memories, the oscillator, the serial transceiver, etc. A supplementary clock pin is placed next to the existing Khepera bus pins to allow for stacked FPGA modules to share the same clock.
The Power board turret (analog part) comprises the voltage regulators that generates the 1.8V and the 3.3V required by the digital components. The supplementary power pins (1.8V, 3.3V, GND) are placed next to the existing Khepera bus pins to be used by the FPGA board turret or by other user turrets.

The architecture of the FPGA module is similar to that of the Excalibur development board \cite{AlteraNios}, modified to perform as a fully Khepera-compatible extension module. The module is also compatible with the Excalibur development tools. The latter allow to design SoC (System on a Chip), mixing hardware and software. Those tools provide a synthesizeable 16 and 32 bit CPU (called Nios) and several peripherals are readily available (e.g. UART or SPI communication controllers, timers, parallel I/O). The main parts of the FPGA module architecture are shown in the figure below and described hereafter.

FPGA module architecture: in addition to the FPGA there are RAM and Flash memories and connectors for interfacing.

Memories and memory bus. The Flash memory contains the configuration of the FPGA, used on power-up or reset. It can also store user data or CPU-executable files. Two SRAM chips can be used for program and data memory. A memory bus interfaces the SRAMs and Flash memories to the APEX FPGA and to the configuration controller. The FPGA has full access to the memories. The configuration controller only accesses the address bus and control signals.
Configuration controller. The FPGA is SRAM-based and its configuration is volatile, i.e. its configuration needs to be downloaded after each power-up or reset. The configuration controller takes care of the download procedure by transferring the configuration file from the Flash to the FPGA. The configuration controller is a non-volatile device and is programmed only once. In normal use this device is never reconfigured.
User interfaces. The module provides two user push-buttons, three user LEDs and two system push-buttons (CPU-clear and system-reset). Configuration switches allow the user to select configuration options of the module (JTAG target device, clock source for multi-module systems, self-reconfiguration enable, main/alternate FPGA configuration selection). In addition, several extension connectors are available, providing 26 3.3V I/O pins, 2 5V-compatible I/O pins, power (GND, 1.8V, 3.3V, 5V) and clock pins.
Programming interfaces. A JTAG and a serial interface with an RS232 transceiver is available through the same connector. The serial interface allows for communication with the FPGA and downloading user programs in the CPU memory. The JTAG interface is used to download a design in the configuration controller or the FPGA.
Khepera bus. All the digital I/O pins of the Khepera expansion bus are connected to the FPGA and hence several interfacing modes are possible between the FPGA and the Khepera or the Khepera extension modules. Memory mapped I/O is the simplest form of interfacing. However it is also possible to use serial communication (RS232) or the K-Net protocol developed by K-Team \cite{KTeamKNet}. When used as a standalone module, 26 supplementary 5-V compatible pins are available for general purpose I/O.

For more informations...

FPGA Module User Guide
Roggen, Hofmann, Thoma and Floreano 2003 describes an application of the FPGA module. A spiking neural network is implemented in hardware and controls the Khepera robot. The network connectivity is evolved to obtain an obstacle avoidance behaviour.
K-Team: the company which makes the Khepera robot