FPGA Module for the Khepera robot

Diploma Student: Stéphane Hofmann
Supervisors: Daniel Roggen and Yann Thoma

FPGA Module for the Khepera robot.
A compact FPGA module has been developed, based on the APEX20K200E FPGA (200'000 gates) from Altera. Although it can be used standalone, its most interesting characteristic is that it is fully mechanically and electrically compatible with the Khepera miniature robot. This FPGA module provides a powerful reconfigurable hardware platform for evolvable hardware or evolutionary robotics experiments.

Description and Architecture

The FPGA module contains the FPGA together with SRAM and Flash memory and several connectors to interface with a PC and user extensions (see table below for a feature list). When used on the Khepera robot, the FPGA module extends considerably the capabilities of the robot. However, the module can also be used standalone or on another robot. In the latter case, the I/O pins previously used to communicate with the Khepera become user I/O.

The FPGA module mounted on top of the Khepera robot. The module is composed of two PCBs, one for the FPGA and another for the power supply. The module can also be used standalone or on other robots.
APEX20K200E-2X FPGA with 200'000 gates, 106'496 RAM bits (8320 logic elements)
1 MByte Flash memory (512Kx16)
256 KBytes SRAM (two 64Kx16 chips)
2 user and 2 system push-buttons, 3 user LEDs, configuration switches
26 3.3V user I/O, 2 5V-compatible user I/O (e.g. TTL serial line)
26 5V-compatible I/O for the Khepera bus or user I/O
Stackable modules (multi-FPGA system sharing a single clock)
RS232 connector with transceiver
JTAG connector for Altera ByteBlasterMV and MasterBlasters programmers
Compatible with Excalibur board software development Kit
Supply voltage: 4.5V to 25V
Power board generates 1.8V and 3.3V (1.4A each voltage)
On-board logic for configuring the FPGA from Flash
Self-reconfiguration may be triggered by the FPGA
Oscillator (33MHz) and zero skew clock distribution
Power-on reset circuitry
Clock and power pins available for user modules
Features of the FPGA module
Some tough problems of space optimization had to be solved to fit the system on a PCB of 58mm of diameter (size of the Khepera robot). The result is a module composed of two stacked PCBs: The architecture of the FPGA module is similar to that of the Excalibur development board \cite{AlteraNios}, modified to perform as a fully Khepera-compatible extension module. The module is also compatible with the Excalibur development tools. The latter allow to design SoC (System on a Chip), mixing hardware and software. Those tools provide a synthesizeable 16 and 32 bit CPU (called Nios) and several peripherals are readily available (e.g. UART or SPI communication controllers, timers, parallel I/O). The main parts of the FPGA module architecture are shown in the figure below and described hereafter.

FPGA module architecture: in addition to the FPGA there are RAM and Flash memories and connectors for interfacing.

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Published: 7.05.03/dr      Last update: 7.05.03/dr